计算机系统综合课程设计-东南大学计算机科学与工程学院

本组光盘粘贴处 请将光盘装入纸袋中粘贴于此。 本组设计主要测试结果与性能分析（.rpt中的资源使用情况） +---------------------------------------------------------------+ ; Assembler Summary ; +-----------------------+---------------------------------------+ ; Assembler Status ; Successful - Tue Sep 19 21:42:50 2006 ; ; Revision Name ; SOC ; ; Top-level Entity Name ; SOC ; ; Family ; Cyclone ; ; Device ; EP1C6F256C6 ; +-----------------------+---------------------------------------+ +------------------------------------------------------------------+ ; Fitter Summary ; +-----------------------+------------------------------------------+ ; Fitter Status ; Successful - Tue Sep 19 21:42:44 2006 ; ; Quartus II Version ; 5.0 Build 148 04/26/2005 SJ Full Version ; ; Revision Name ; SOC ; ; Top-level Entity Name ; SOC ; ; Family ; Cyclone ; ; Device ; EP1C6F256C6 ; ; Timing Models ; Final ; ; Total logic elements ; 4,632 / 5,980 ( 77 % ) ; ; Total pins ; 85 / 185 ( 45 % ) ; ; Total virtual pins ; 0 ; ; Total memory bits ; 50,176 / 92,160 ( 54 % ) ; ; Total PLLs ; 0 / 2 ( 0 % ) ; +-----------------------+------------------------------------------+ +--------------------------------------------------------------------+ ; Flow Summary ; +-------------------------+------------------------------------------+ ; Flow Status ; Successful - Tue Sep 19 21:43:35 2006 ; ; Quartus II Version ; 5.0 Build 148 04/26/2005 SJ Full Version ; ; Revision Name ; SOC ; ; Top-level Entity Name ; SOC ; ; Family ; Cyclone ; ; Met timing requirements ; No ; ; Total logic elements ; 4,632 / 5,980 ( 77 % ) ; ; Total pins ; 85 / 185 ( 45 % ) ; Total virtual pins ; 0 ; Total memory bits ; 50,176 / 92,160 ( 54 % ) ; Total PLLs ; 0 / 2 ( 0 % ) ; Device ; EP1C6F256C6 ; ; Timing Models ; Final ; +-------------------------+------------------------------------------+ +------------------------------------------------------------------------+ ; Analysis&Synthesis Summary +-----------------------------+------------------------------------------+ ; Analysis & Synthesis Status ; Successful - Tue Sep 19 21:37:38 2006; ; Quartus II Version ; 5.0 Build 148 04/26/2005 SJ Full Version ; ;RevisionName ;SOC ; ; Top-level Entity Name ; SOC ; ;Family ;Cyclone ; ; Total logic elements ; 5,606 ; ; Total pins ;85 ; ; Total virtual pins ; 0 ; ; Total memory bits ; 50,176 ; ;Total PLLs ; 0 ; +-----------------------------+------------------------------------------+ +--------------------------------------------------------------------------------------+ ;Power Play Power Analyzer Summary ; +-----------------------------------+--------------------------------------------------+ ; PowerPlay Power Analyzer Status; Successful - Tue Sep 19 20:46:01 2006 ; ; Quartus II Version ; 5.0 Build 148 04/26/2005 SJ Full Version; ; Revision Name ; SOC ; ; Top-level Entity Name ; mips32 ; ; Family ; Cyclone ; ; Device ; EP1C20F400C6 ; ; Total Thermal Power Dissipation ; 120.11 mW ; ; Dynamic Thermal Power Dissipation ; 0.00 mW ; ; Static Thermal Power Dissipation ; 120.11 mW ; ; Power Estimation Confidence ; Low: user provided insufficient toggle rate data ; +-----------------------------------+--------------------------------------------------+ +--------------------------------------------+ ; Simulator Summary ; +-----------------------------+--------------+ ; Type ; Value ; +-----------------------------+--------------+ ; Simulation Start Time ; 0 ps ; ; Simulation End Time ; 8.3 us ; ; Simulation Netlist Size ; 21811 nodes ; ; Simulation Coverage ; 21.84 % ; ; Total Number of Transitions ; 156001 ; +-----------------------------+--------------+ 测试SOC主频：16.67MHz 测试SOC功耗：120.22mW