Si4430-3中文资料 - 图文

(fhs[7:0]) is set in increments of 10 kHz with a maximum channel step size of 2.56 MHz. The Frequency Hopping Channel Select Register then selects channels based on multiples of the step size.

当寄存器73h–77h可用于编程Si4430/31/32的载波频率时，在―信道‖或―信道数‖方面进行考虑比在绝对频率Hz值方面进行考虑更为方便，另外，可能存在一些希望通过编程单个寄存器来改变频率的一些定时非常重要的应用(譬如：跳频系统)，一旦信道步幅大小被设定，则频率可以通过与信道数对应的单个寄存器进行修改。如上所述利用寄存器73h–77h首先设置标称频率，寄存器79h和7Ah然后被用于设置相对于标称设置的信道步幅大小和信道数。跳频步幅大小(fhs[7:0])是按10 kHz增量设置的，最大信道步幅为2.56 MHz，跳频信道选择寄存器然后选择基于步幅倍数的信道。

For example, if the nominal frequency is set to 900 MHz using Registers 73h–77h, the channel step size is set to 1 MHz using \79h. Frequency Hopping Channel Select\905 MHz. Once the nominal frequency and channel step size are programmed in the registers, it is only necessary to program the fhch[7:0] register in order to change the frequency.

例如：如果标称频率利用寄存器73h–77h被设置为900 MHz，信道步幅利用\寄存器7Ah. 跳

频步幅\被设置为1 MHz， \寄存器79h. 跳频信道选择\被设置为5d, 则最终的载波频率将为905 MHz。一旦标称频率和信道步幅被编程到寄存器中，则为了改变频率，你只需要编程fhch[7:0]寄存器。

Add 79 R/W R/W Function/Description 功能/描述 Frequency Hopping Channel Select 跳频信道选择 Frequency Hopping Step Size 跳频步幅 D7 fhch[7] D6 fhch[6] D5 fhch[5] D4 fhch[4] D3 D2 D1 fhch[1] fhch[3] fhch[2] POR Def. fhch[0] 00h D0 7A R/W fhs[7] fhs[6] fhs[5] fhs[4] fhs[3] fhs[2] fhs[1] fhs[0] 00h 3.5.3. Automatic State Transition for Frequency Change 针对频率变化的自动状态转换 If registers 79h or 7Ah are changed in either TX or mode, the state machine will automatically transition the chip back to TUNE, change the frequency, and automatically go back to either TX or RX. This feature is useful to reduce the number of SPI commands required in a Frequency Hopping System. This in turn reduces microcontroller activity, reducing current consumption. The exception to this is during TX FIFO mode. If a frequency change is initiated during a TX packet, then the part will complete the current TX packet and will only change the frequency for subsequent packets.

如果寄存器79h或7Ah在TX或RX方式被修改，则机器状态将自动使芯片返回到TUNE(调谐)来改变频率并自动回到TX或RX。此特性对于减少跳频系统中所需的SPI指令的条数很有用处，这反过来减少了微控制器的活跃度，降低了电流消耗。例外情况是在TX堆栈方式期间，如果频率变化是在TX数据包期间开始的，那么这一部分将完成当前的TX数据包并且仅改变后续数据包的频率。

3.5.4. Frequency Deviation 频率偏差

The peak frequency deviation is configurable from ±0.625 to ±320 kHz. The Frequency Deviation (Δf) is controlled by the Frequency Deviation Register (fd), address 71 and 72h, and is independent of the carrier frequency setting.

最大频偏可以在±0.625 ~ ±320 kHz范围内设置，频偏(Δf)受频偏寄存器(fd)、地址71和72h控制，与载波频率设置无关。

When enabled, regardless of the setting of the hbsel bit (high band or low band), the resolution of the frequency deviation will remain in increments of 625 Hz. When using frequency modulation the carrier frequency will deviate from the nominal center channel carrier frequency by ±Δf:

当开启时，无论hbsel位的设置如何(高频段或低频段)，频偏的分辨率将保持625 Hz的增量，当采用频率调制时，载波频率将与标称中心信道的载波频率偏差±Δf:

图10 频偏

The previous equation should be used to calculate the desired frequency deviation. If desired, frequency modulation may also be disabled in order to obtain an unmodulated carrier signal at the channel center frequency; see \

上面的方程将用于计算所需的频率偏差，需要时，频率调制也可以被关闭以便获得处于信道中心频率的未调制的载波信号；关于进一步的详情，请参看32页上的\调制类型\。

Add 71 72 R/W Function/Description 功能描述 Modulation Mode Control 2 R/W 调制方式控制2 R/W Frequency Deviation 频偏 D7 trclk[1] fd[7] D6 trclk[0] fd[6] D5 dtmod[1] fd[5] D4 dtmod[0] fd[4] D3 eninv fd[3] D2 D1 D0 modtyp[0] fd[0] POR Def. 00h 20h fd[8] modtyp[1] fd[2] fd[1] 3.5.5. Frequency Offset Adjustment 频率偏置调整

When the AFC is disabled the frequency offset can be adjusted manually by fo[9:0] in registers 73h and 74h. It is not possible to have both AFC and offset as internally they share the same register. The frequency offset adjustment and the AFC both are implemented by shifting the Synthesizer Local Oscillator frequency. This register is a signed register so in order to get a negative offset it is necessary to take the twos complement of the positive offset number. The offset can be calculated by the following:

当AFC(自动频率控制)关闭时，频率偏置可以通过寄存器73h和74h中的fo[9:0]进行手动调整，但无法同时拥有AFC和偏置，因为它们内部共享同一寄存器。频率偏置调整和AFC都可以通过移动合成器本机振动频率来实现，该寄存器是一个带符号的寄存器以便获得一个负偏置，对于正的偏置数必须采用2的补码，该偏置可以通过下列公式计算

The adjustment range in high band is ±160 kHz and in low band it is ±80 kHz. For example to compute an offset of +50 kHz in high band mode fo[9:0] should be set to 0A0h. For an offset of –50 kHz in high band mode the fo[9:0] register should be set to 360h.

高频段的调整范围为±160 kHz，低频段的调整范围为±80 kHz，譬如：要计算高频段的+50 kHz的偏置，则方式fo[9:0]应当设置为0A0h，对于高频段的–50 kHz的偏置，fo[9:0]寄存器应当设置为360h。

Add R/W Function/Description 功能/描述 D7 D6 D5 D4 D3 D2 D1 D0 POR Def. 00h 00h 73 74 R/W Frequency Offset 频率偏置 R/W Frequency Offset 频率偏置 fo[7] fo[6] fo[5] fo[4] fo[3] fo[2] fo[1] fo[9] fo[0] fo[8] 3.5.6. Automatic Frequency Control 自动频率控制(AFC)

All AFC settings can be easily obtained from the settings calculator. This is the recommended method to program all AFC settings. This section is intended to describe the operation of the AFC in more detail to help understand the trade-offs of using AFC.The receiver supports automatic frequency control (AFC) to compensate for frequency differences between the transmitter and receiver reference frequencies. These differences can be caused by the absolute accuracy and temperature dependencies of the reference crystals. Due to frequency offset compensation in the modem, the receiver is tolerant to frequency offsets up to 0.25 times the IF bandwidth when the AFC is disabled. When the AFC is enabled, the received signal will be centered in the pass-band of the IF filter, providing optimal sensitivity and selectivity over a wider range of frequency offsets up to 0.35 times the IF bandwidth. The trade-off of receiver sensitivity (at 1% PER) versus carrier offset and the impact of AFC are illustrated in Figure 11.

所有AFC设置可以从设置计算器中方便地获得, 这是编程所有的AFC设置的推荐方法, 本节想更加详细地描述AFC的操作以帮助理解采用AFC的得失. 接收器支持自动频率控制(AFC)

以补偿在发送器和接收器基准频率之间的频率偏差. 这些差值可能是由基准晶振的绝对精度和温度的变化关系引起，由于调制解调器中的频偏补偿，因此当AFC关闭时，接收器可以容忍最大为中频带宽的0.25倍的频偏。当AFC打开时，接收到的信号将处于中频滤波器的通带中心，提供在最大为中频带宽的0.35倍的频偏范围内的最佳的灵敏度和选择性，接收器灵敏度(在1% PER条件下)与载波偏差之间的平衡以及AFC的影响如图11中所示。

Figure 11. Sensitivity at 1% PER vs. Carrier Frequency Offset 图11 在1% PER(位误码率)时灵敏度与载波频率偏置的关系

When AFC is enabled, the preamble length needs to be long enough to settle the AFC. In general, one byte of preamble is sufficient to settle the AFC. Disabling the AFC allows the preamble to be shortened from 40 bits to 32 bits. Note that with the AFC disabled, the preamble length must still be long enough to settle the receiver and to detect the preamble (see \changing the frequency of the Fractional-N PLL. When the preamble is detected, the AFC will freeze for the remainder of the packet. In multi-packet mode the AFC is reset at the end of every packet and will re-acquire the frequency offset for the next packet. The AFC loop includes a bandwidth limiting mechanism improving the ejection of out of band signals. When the AFC loop is enabled, its pull-in-range is determined by the bandwidth limiter value (AFCLimiter) which is located in register 2Ah.

当AFC打开时，报头长度需要足够长以便使得AFC稳定下来。一般来说，1字节的报头足以使得AFC稳定下来。关闭AFC则允许报头从40位缩短至32位，注意：当AFC关闭时，报头仍然必须足够长以便使得接收器稳定并且检测到报头(参看47页上的\报头长度\。AFC通过改变分数N PLL(锁相环)的频率来纠正检测到的频偏，当检测到报头时，AFC将冻结数据包的其余部分。在多数据包方式，AFC在每个数据包的末尾复位并且重新采集频偏至下一个数据包。AFC回路包括一个改善带外信号喷发的带宽限制机构，当AFC回路打开时，其牵引范围由位于寄存器2Ah中的带宽限制值(AFCLimiter)确定。

AFC_pull_in_range = ±AFCLimiter[7:0] x (hbsel+1) x 625 Hz

The AFC Limiter register is an unsigned register and its value can be obtained from the EZRadioPRO Register Calculator spreadsheet.

The amount of error correction feedback to the Fractional-N PLL before the preamble is detected is controlled from afcgearh[2:0]. The default value 000 relates to a feedback of 100% from the measured frequency error and is advised for most applications. Every bit added will half the feedback but will require a longer preamble to settle.

AFC限制寄存器是一个无符号寄存器，其值可以从EZRadioPRO寄存器计算器电子表格中获得。 在报头被检测到之前反馈至分数N PLL(锁相环)的误差校正量受afcgearh[2:0]的控制，默认值000