poc设计报告

Computer Organization and Architecture

Course Design

A parallel output controller(poc)

04010223 Chao Song

School of Information Science and Engineering

Southeast University

March 2013

1.Purpose

The purpose of this project is to design and simulate a parallel output controller (POC) which acts an interface between system bus and printer. The Altera’s Quartus II EDA tool is recommended and provided for simulation. 2.Introduction and requirements

POC is one of the most common I/O modules, namely the parallel output controller. It plays the

role of an interface between the co mputer system bus and the peripheral (such as a printer or other output devices).

Figure 1 shows the connecting of a pr inter to the system bus through the POC. The communication between POC and the printer is controlle d by a “handshake” protocol

illustrated in Figure 2.

The handshaking process is described as follows: When the printer is ready to receive a character, it holds RDY= 1.The POC must then hold a character at PD (parallel data) port and produce a pulse at the terminal TR (transfer request). The printer will change RDY to 0, take the character at PD and hold the RDY at 0 until the character has been printed (e.g. 5 or 10ms), then set RDY= 1 again when it is ready to receive the next character. (Suppose the printer has only a one character “buffer” register, so that each character must be printed before the next character is sent). 3.Top Module

4.Three Components 4.1.Simplified CPU

Ports CLOCK IRQ RESET RW CHOOSE D[7.0] 4.2.Poc

Definitions Clock signal Interrupt request Reset signal Read or write signal Register enable signal Data input/output Ports CS RESET SB Definitions Chip select signal Reset signal Register select signal