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ADC转换器
参考电压模块的版图设计
学 院: 专 业: 姓 名: 学 号: 指导老师: 职 称:
中国·珠海 二○一2 年 五 月
本人郑重承诺:我所呈交的毕业设计(论文)《ADC转换器参考电压模块的版图设计》是在指导教师的指下,独立开展研究取得的成果,文中引用他人的观点和材料,均在文后按顺序列出其参考文献,设计(论文)使用的数据真实可靠。
承诺人签名: 日期: 年 月 日
北京理工大学珠海学院2010届本科生毕业设计(论文)
摘 要
版图设计是决定良率高低的一个重要环节,按设计自动化程度来分,可将版图设计方法分成手工设计和自动设计两大类。按照对布局布线位置的限制和布局模块的限制来分, 则可把设计方法分成全定制和半定制两大类。由于制造工艺水平的提高,特征尺寸的减小,各种寄生参数对电路的影响也越来越大,在版图设计中有越来越多的问题要考虑。
本文首先是分析比较了各种高速模数转化器的特点之后采用Cadence公司的Virtuoso定制设计平台,使用全定制的的方法对一个ADC参考电压电路进行版图设计,ADC参考电压电路使用了cmos工艺,量程为0.5V,在版图时调用Cadence公司提供的90nm标准cmos工艺库,用Spectre工具对电路进行了性能分析和仿真,并在Cadence公司提供的工艺文件下完成了版图设计,详细的分析了版图设计的过程,介绍了DRC规则和LVS,然后使用Assura工具进行DRC和LVS验证,进行仿真的验证,证明本论文的版图设计完全符合要求。在最后还对一些DRC和LVS错误进行了分析。
关键词:参考电压电路 版图设计 cmos 工艺 全定制 后仿真
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北京理工大学珠海学院2010届本科生毕业设计(论文)
Abstract
Layout design is an important part of the rate decision according to the degree of automation design, and layout design methods can be divided into the design manual and automatic design of two categories. According to the place and route location and layout of the restrictions to limit the sub-module, the design methods can be divided into full-custom and semi-custom two categories. Since raising the level of manufacturing technology, feature size decreases, the various parameters on the circuit parasitic effects also growing in the territory of the design of a growing number of issues to consider.
This paper is a comparative analysis of the characteristics of digital converter using Cadence Virtuoso company, use the custom design platform for a method of customized reference voltage circuit ADC layout design,. ADC reference voltage circuit to maintain the use of the cmos technology, Range for 0.5 V, called the Cadence companies to provide standard cmos 90 nm process for using the tools Spectre circuit performance analysis and simulation, and Cadence technology companies to provide the documents to complete the layout, a detailed analysis of the layout design process, the DRC rules are introduced and use of Assura Tools DRC and LVS verification,and simulation test to prove that the layout of the paper fully meet the requirements. In the end, some mistakes of LVS DRC and analyzed.
Key Words:reference voltage circuit layout design cmos technology full-custom post
layout simulation.
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