AD7705中文资料

ad7706,ad7705中文资料,工作原理，C语言接口程序，引脚图，管脚

工作原理： AD7705/06以及AD7707是比较典型

的一种16位A/D转换芯片。 AD7705/06芯片是带有自校正功能的Σ-Δ于A/D转换器。其内部由多路模拟开关、缓冲器、可编程增益放大器（PGA）、Σ-Δ调制器、数字滤波器、基准电压输入、时钟电路及串行接口组成。其中串行接口包括寄存器组，它由通讯寄存器、设置寄存器、时钟寄存器、数据输出寄存器、零点校正寄存器和满程校正寄存器等组成。该芯片还包括2通道差分输入（AD7705）和3种伪差分通道输入（AD7706）。

AD7705/06的PGA可通过指令设定，对不同幅度的输入信号实现1、2、4、8、16、32、64和128倍的放大，因此AD7705/06芯片既可接受从传感器送来的低电平输入信号，亦可接受高电平（10V）信号，它运用Σ―Δ技术实现16位无误码性能；它的输出速度同样可由指令设定，范围由 20Hz到500Hz；它能够通过指令设定对零点和满程进行校正；AD7705/06与微处理器的数据传送通过串行方式进行，采用了节省端口线的通讯方式，最少只占用控制机的两条端口线。

AD7705引脚图（管脚图）：

AD7706引脚图（管脚图）：

AD7705与68HC系列单片机的C语言接口程序：

/* This program has read and write routines for the 68HC11 to interface to the AD7705 and the sample program sets the various

registers and then reads 1000 samples from one channel. */

#include #include

#define NUM_SAMPLES 1000 /* change the number of data samples */

#define MAX_REG_LENGTH 2 /* this says that the max length of a register is 2 bytes */ Writetoreg (int); Read (int,char);

char *datapointer = store;

char store[NUM_SAMPLES*MAX_REG_LENGTH + 30]; void main() {

/* the only pin that is programmed here from the 68HC11 is the /CS and this is why the PC2 bit of PORTC is made as

an output */ char a;

DDRC = 0x04; /* PC2 is an output the rest of the port bits are inputs */

PORTC | = 0x04; /* make the /CS line high */

Writetoreg(0x20); /* Active Channel is Ain1(+)/Ain1(-), next operation as write to the clock register */

Writetoreg(0x0C); /* master clock enabled, 4.9512MHz Clock, set output rate to 50Hz*/

Writetoreg(0x10); /* Active Channel is Ain1(+)/Ain1(-), next operation as write to the setup register */

Writetoreg(0x40); /* gain = 1, bipolar mode, buffer off, clear FSYNC and perform a Self Calibration*/

while(PORTC & 0x10); /* wait for /DRDY to go low */ for(a=0;a

Writetoreg(0x38); /*set the next operation for 16 bit read from the data register */ Read(NUM_SAMPES,2); } }

Writetoreg(int byteword); {

int q;

SPCR = 0x3f;

SPCR = 0X7f; /* this sets the WiredOR mode(DWOM=1), Master mode(MSTR=1), SCK idles high(CPOL=1), /SS can be low

always (CPHA=1), lowest clock speed(slowest speed which is master clock /32 */

DDRD = 0x18; /* SCK, MOSI outputs */ q = SPSR;

q = SPDR; /* the read of the staus register and of the data register is needed to clear the interrupt which tells the user that the

data transfer is complete */

PORTC &= 0xfb; /* /CS is low */

SPDR = byteword; /* put the byte into data register */ while(!(SPSR & 0x80)); /* wait for /DRDY to go low */ PORTC |= 0x4; /* /CS high */ }

Read(int amount, int reglength) {

int q;

SPCR = 0x3f;

SPCR = 0x7f; /* clear the interupt */

DDRD = 0x10; /* MOSI output, MISO input, SCK output */

while(PORTC & 0x10); /* wait for /DRDY to go low */ PORTC & 0xfb ; /* /CS is low */ for(b=0;b

SPDR = 0;

while(!(SPSR & 0x80)); /* wait until port ready before reading */

*datapointer++=SPDR; /* read SPDR into store array via datapointer */ }

PORTC|=4; /* /CS is high */ }